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AES-NI (or the Intel Advanced Encryption Standard New Instructions; AES-NI) was the first major implementation. AES-NI is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008.
Intel SHA extensions. Intel SHA Extensions are a set of extensions to the x86 instruction set architecture which support hardware acceleration of Secure Hash Algorithm (SHA) family. It was introduced in 2013. Instructions for SHA-512 will be introduced in Arrow Lake and Lunar Lake in 2024. The original SSE -based extensions added four ...
On Intel Core and AMD Ryzen CPUs supporting AES-NI instruction set extensions, throughput can be multiple GiB/s (even over 15 GiB/s on an i7-12700k). On a Intel Westmere CPU, AES encryption using AES-NI takes about 1.3 cpb for AES-128 and 1.8 cpb for AES-256.
AES-256 A byte-oriented portable AES-256 implementation in C. Solaris Cryptographic Framework offers multiple implementations, with kernel providers for hardware acceleration on x86 (using the Intel AES instruction set) and on SPARC (using the SPARC AES instruction set). It is available in Solaris and derivatives, as of Solaris 10.
VeraCrypt. VeraCrypt is a free and open-source utility for on-the-fly encryption (OTFE). [5] The software can create a virtual encrypted disk that works just like a regular disk but within a file. It can also encrypt a partition [6] or (in Windows) the entire storage device with pre-boot authentication.
Galois/Counter Mode. In cryptography, Galois/Counter Mode ( GCM) [1] is a mode of operation for symmetric-key cryptographic block ciphers which is widely adopted for its performance. GCM throughput rates for state-of-the-art, high-speed communication channels can be achieved with inexpensive hardware resources.
CPUID EAX=1: Processor Version Information in EAX. Stepping ID is a product revision number assigned due to fixed errata or other changes. The actual processor model is derived from the Model, Extended Model ID and Family ID fields. If the Family ID field is either 6 or 15, the model is equal to the sum of the Extended Model ID field shifted ...
Cryptographic accelerator. In computing, a cryptographic accelerator is a co-processor designed specifically to perform computationally intensive cryptographic operations, doing so far more efficiently than the general-purpose CPU. Because many servers ' system loads consist mostly of cryptographic operations, this can greatly increase performance.